<p><span class="h-card" translate="no"><a href="https://hachyderm.io/@GeneralShaw" class="u-url mention">@<span>GeneralShaw</span></a></span> no plans to add verilator/iverilog support, sorry! this is fundamentally tied to CXXRTL. that said, you could in principle reimplement the CXXRTL server</p>

<p><span class="h-card" translate="no"><a href="https://screaminginsi.de/@ezri" class="u-url mention">@<span>ezri</span></a></span> heck yeah!!!!</p>

There are no reasons why you shouldn't have child bearing hips, specifically, when you are male

<p><span class="h-card" translate="no"><a href="https://fosstodon.org/@rasmus91" class="u-url mention">@<span>rasmus91</span></a></span> I regularly get people to recommend Keto to me. It’s like a cult. I can’t do keto because I’m high risk for heart disease and heart attack. I have a branch bundle block as well so heart health is number one priority</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> This sounds absolutely amazing</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.online/@danirabbit" class="u-url mention">@<span>danirabbit</span></a></span> my parents do Keto, both lost lots of weight since they started. They eat a lot of cheese. But it&#39;s proper cheese, not any of the nonsense stuff that has cheese in it, but it&#39;s really starch and other stuff.</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.social/@MekahimeAkari" class="u-url mention">@<span>MekahimeAkari</span></a></span> thanks ^^</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> this is an unreal level of cool!!!</p>

<p>imagine being able to set a breakpoint on a condition in your source code, and then run your simulation up until the point where the condition becomes true--all with as little as 10% time overhead and without multi-gigabyte VCD files, but while still retaining the full view of the design... anywhere in a mixed Amaranth/Verilog/VHDL environment</p><p>this was prototyped and should be ready for use with just a bit of development and polishing</p>