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<p><span class="h-card" translate="no"><a href="https://chaos.social/@f4grx" class="u-url mention">@<span>f4grx</span></a></span> it&#39;s just normal code. lots and lots of normal numerics code</p>
<p><span class="h-card" translate="no"><a href="https://infosec.exchange/@magnetic_tape" class="u-url mention">@<span>magnetic_tape</span></a></span> ARM® Debug Interface Architecture Specification ADIv5.0 to ADIv5.2</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> ciphered and copied in ram before running? what are the vectors pointing to? there should be boot code there.</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span><br />What&#39;s ADIv5.2?</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> this is an excellent tip! Thank you!</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> Too many times I drilled down in like three levels of subroutines calls in the STM32 HAL code to have it end with “if (arg = 1) set bit else reset bit” when the ENTIRE call stack could<br />be replaced with<br /> reg = (reg &amp; ~bit) | (flag) ? bit : 0;</p><p>or *REG_ADDRESS = value;</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> agreed :/</p>
<p>my annoying engineering trait is that i don&#39;t like hardware abstraction layers</p><p>they&#39;re usually annoying to write code for, and equally annoying to reverse-engineer whenever i need to. i mostly end up reverse-engineering these days</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@gamingonlinux" class="u-url mention">@<span>gamingonlinux</span></a></span> I guess Valve will aim for UDNA GPU cores. 2027 seems reasonable for that.</p>