<p><span class="h-card" translate="no"><a href="https://types.pl/@lenary" class="u-url mention">@<span>lenary</span></a></span> yeah! can you tell me a bit about SandboxIR? I&#39;ve not heard of it</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.social/@regehr" class="u-url mention">@<span>regehr</span></a></span> very happy i wrangled this into submission, the confidence this adds is important</p><p>currently working on encoding single step induction</p>

<p><span class="h-card" translate="no"><a href="https://social.sciences.re/@MonniauxD" class="u-url mention">@<span>MonniauxD</span></a></span> does it show a diff of IR? that&#39;s the thing i claim to be an innovation here</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> until we get fully verified compilers, this is the way</p>

<p>it makes some sense that I&#39;m having trouble with it. I think it&#39;s technically DOUBLECOMPRESSED</p>

<p><span class="h-card" translate="no"><a href="https://not.acu.lt/@ignaloidas" class="u-url mention">@<span>ignaloidas</span></a></span> &quot;but retiming&quot; you could say</p><p>for retiming i think i&#39;ll try to make the passes that do it inject a witness of the transformation into the netlist that turns into a transformation on the state bits or... something. i haven&#39;t fully thought it through yet</p>

<p><span class="h-card" translate="no"><a href="https://not.acu.lt/@ignaloidas" class="u-url mention">@<span>ignaloidas</span></a></span> it&#39;s more complicated than that! i am actually working on adding sequential verification now. the fact that you know when a flop is replaced with another flop (as opposed to having to try to do isomorphism or other structural examination of the graphs to figure out which one should be which) makes this problem _way_ more tractable</p>

@whitequark@mastodon.social I feel like the fact that it's essentially just a bunch of bit operations with no outside effects help, correctly capturing them feels difficult with SMT, while comparing stateless circuits is way easier Very cool anyways

<p>also, you can print the design at any time and if it contains unapplied changes, we print it with diff markup too</p><p>i&#39;m not aware of any other compiler that does this, and this is _incredibly_ useful for investigating failed transformations, especially given how instructions in our IR don&#39;t have names and are renumbered very often</p>