Whole-known-network
<p>apparently my idea of what to do on a big pain day is to learn Lean 4 from the reference manual</p>
<p><span class="h-card" translate="no"><a href="https://social.noyu.me/@hikari" class="u-url mention">@<span>hikari</span></a></span> a long thin metal tube *will* move</p><p>maybe if you go for carbon fiber, and even then</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> oh God thanks, I am really bad with numbers but I only had a hunch because I read up sth in this reference like ages ago. Well carry on 👋🏾</p>
<p><span class="h-card" translate="no"><a href="https://social.tchncs.de/@ppxl" class="u-url mention">@<span>ppxl</span></a></span> maybe 😇</p>
<p><span class="h-card" translate="no"><a href="https://radiosocial.de/@hennichodernich" class="u-url mention">@<span>hennichodernich</span></a></span> <span class="h-card" translate="no"><a href="https://ioc.exchange/@azonenberg" class="u-url mention">@<span>azonenberg</span></a></span> oh, i even have the flashes somewhere, it would be almost trivial</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> is this a Polish pope reference, again?</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> <span class="h-card" translate="no"><a href="https://ioc.exchange/@azonenberg" class="u-url mention">@<span>azonenberg</span></a></span> I'm currently struggling with dumping an ESMT F50-series QSPI NAND flash. flashrom doesn't support it, loading the spinand.ko module on Raspberry Pi detects the chip correctly but fails to access its contents. My suspicion is the SPI controller, so I thought about synthesizing a Cadence QSPI into a Zynq-7000 and accessing it from Petalinux.<br />I have no idea how much effort it would be to write a SPI-NAND applet for Glasgow.</p>
<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> Also most of the cheap FPGA devkits don't have a MCU, and either 10/100 ethernet or USB2 as the only PC interface</p><p>Dumptruck has an RGMII PHY direct to the FPGA, plus a STM32H735 connected by a fast memory mapped interface (>500 Mbps throughput) to the FPGA.</p><p>Right now all of the dumping algorithms are software driven, as is the TCP/IP stack. over time as I build out an accelerated processing flow and move more of the datapath to FPGA I expect performance to skyrocket. There's a lot of round tripping now.</p>
<p><span class="h-card" translate="no"><a href="https://ioc.exchange/@azonenberg" class="u-url mention">@<span>azonenberg</span></a></span> oh yeah that makes sense</p>