<p>I was going to buy my mom an iPad Air, but for what?! Her iPad is 7 years old so the new iPad has 128GB and thus is perfect.</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.social/@timonsku" class="u-url mention">@<span>timonsku</span></a></span> I think this is a remnant of USB terminology, where both ends transmit and receive at the same time</p>

<p>My workplace is hiring again, this time for a junior data person who can help with csv file cleanup, creating hash files, and filtering contact lists. The role could expand into data analysis and some machine learning if you&#39;re interested and have those skills or the ability to learn. Looking for basic competence with <a href="https://mstdn.social/tags/Python" class="mention hashtag" rel="tag">#<span>Python</span></a> and <a href="https://mstdn.social/tags/SQL" class="mention hashtag" rel="tag">#<span>SQL</span></a>. </p><p>We&#39;re an all-remote firm! Looking to hire someone ASAP. We work for Democratic campaigns and non-profits. US-based only, sorry!</p><p><a href="https://mstdn.social/tags/FediHire" class="mention hashtag" rel="tag">#<span>FediHire</span></a> <a href="https://mstdn.social/tags/GetFediHired" class="mention hashtag" rel="tag">#<span>GetFediHired</span></a></p>

<p>Words written by the utterly deranged.</p><p>You are telling me my &quot;Upstream device&quot; does not have the &quot;upstream port&quot; it has a &quot;downstream facing port&quot; because it is *transmitting* the signal to a *receiving* device?<br />Or in other words one is the transmitter and one the receiver? ....</p>

<p>Can I just say that I hate little more than the upstream/downstream terminology when it comes to connectors. It&#39;s the most confusing shit.<br />Just say source port and sink port or transmitter/receiver, anything really.<br />Who thought &quot;Upstream Facing Port&quot; is in any way a clear terminology.</p>

<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> <span class="h-card" translate="no"><a href="https://types.pl/@wren6991" class="u-url mention">@<span>wren6991</span></a></span> Probably more than hyperram.</p><p>But 32 Gbps is closer to what you&#39;d get from a full scale SSTL bus, e.g. a 32 bit DDR3 1066 interface is 34 Gbps of interface bandwidth.</p><p>I suspect the power consumption of a single SERDES would be pretty favorable compared to 32 SSTL DQ pins, four DQS lanes, plus the C/A bus, etc. And you&#39;re doing all that with a total of four signals. There&#39;s definitely a spot in the design space it would work well for.</p>

<p><span class="h-card" translate="no"><a href="https://ioc.exchange/@azonenberg" class="u-url mention">@<span>azonenberg</span></a></span> <span class="h-card" translate="no"><a href="https://types.pl/@wren6991" class="u-url mention">@<span>wren6991</span></a></span> how much power though</p>

<p><span class="h-card" translate="no"><a href="https://types.pl/@wren6991" class="u-url mention">@<span>wren6991</span></a></span> I was thinking of this more as a hyperram replacement though.</p><p>Hyperbus: 13 pins, single ended, seems to top out at 400 MT/s on an 8 bit bus = 3.2 Gbps half duplex link bandwidth</p><p>My concept: 4 pins, differential, as fast as your SERDES IP can run, full duplex. With 16G NRZ transceivers you&#39;d get 32 Gbps of bidirectional bandwidth for 50% read/write mix, or 10x hyperram, using 1/3 as many pins.</p>

<p>I&#39;ve always been leery of the “sign out of your Apple ID and then sign back in” advice, but I tried it today in hopes of getting the Mac App Store unfucked. Spent about an hour trying to convince Settings that I really was me, as it kept spinning gears during the signin process and failing to authorize credentials that were definitely correct. Now I’m signed back into my account but the MAS is still fucked, and I&#39;ve never been angrier at Apple and its software quality control.</p>