<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> My memory of ARM shows that the ARM interrupt vector is either located at 0x00000000 or 0xffff0000 (called HIVECS), when without some late extensions. Seems that <a href="https://developer.arm.com/documentation/ddi0406/cb/Appendixes/ARMv4-and-ARMv5-Differences/System-level-register-support/The-exception-model" target="_blank" rel="nofollow noopener noreferrer" translate="no"><span class="invisible">https://</span><span class="ellipsis">developer.arm.com/documentatio</span><span class="invisible">n/ddi0406/cb/Appendixes/ARMv4-and-ARMv5-Differences/System-level-register-support/The-exception-model</span></a> is describing the vector on ARMv4/5.</p>