<p><span class="h-card" translate="no"><a href="https://chaos.social/@dlharmon" class="u-url mention">@<span>dlharmon</span></a></span> for amaranth-stdio, I find it very useful implementation-wise that two clock phases correspond to one data phase, while that blip at the end is making my life hard if I&#39;m aiming at 100% cycle utilization</p>
Reply