<p><span class="h-card" translate="no"><a href="https://fosstodon.org/@aleksorsist" class="u-url mention">@<span>aleksorsist</span></a></span> <span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> <span class="h-card" translate="no"><a href="https://social.treehouse.systems/@urja" class="u-url mention">@<span>urja</span></a></span> Lol.</p><p>A VLIW processor may actually end up being the logical implementation of this. Who knows.</p><p>But the more I think about it, the more I lean towards a two-part system with a bunch of parallel function blocks that output one or more bits every cycle (each block having a bunch of config registers to specify muxing and thresholds and such), then a serial state machine operating on their output.</p>