<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> <span class="h-card" translate="no"><a href="https://digipres.club/@abrasive" class="u-url mention">@<span>abrasive</span></a></span> It was possible to implement an 1149.1 compliant client for the protocol by switching from SHIFT-DR back to RTI and into SHIFT-DR for each 32-bit word. The FPGA side didn't care. It just allowed this optimized version if your probe could handle it.</p><p>And I was already building my own MIPS-1 CPU (this predated the widespread use of RISC-V by quite a bit, it was circa 2011), gdbserver, interconnect, etc. in order to test all of the weird stuff I needed for Antikernel.</p><p>I created scopeclient (the GTK based, fully software rendered, horribly slow ancestor of glscopeclient) to interface with the custom logic analyzer IP I wrote because ChipScope for ISE was a paid block I didn't have the money for, and while gtkwave was an OK waveform viewer it had no trigger integration.</p><p>So a custom debug probe on top of that was just excessive. (I was already making custom FTDI dongles but not full custom drivers/protocols)</p>
