<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention">@<span>whitequark</span></a></span> 25-series SPI (like <span class="h-card" translate="no"><a href="https://social.v.st/@th" class="u-url mention">@<span>th</span></a></span> 's spispy) sounds difficult due to the tight timing.<br />Not sure about ONFI.<br />SD/MMC/SDIO emulation sounds very possible, as it would be possible to do the timing-critical parts in the FPGA and delegate everything else to the host, which allows for some interesting usecases such as exploiting TOCTOUs in eMMC access, or emulating SDIO WiFi (and the enormous driver attack surface that comes with it)</p>
